1 | Introduction | ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) |
2 | Number Systems and Boolean Algebra | ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) |
3 | Combinational Logic | ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) |
4 | Sequential Logic | ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) |
5 | Verification Approaches | |
6 | State Machines | ![](http://www.levent.tc/wp-content/uploads/2020/09/dl-1.png) |
7 | Databus Elements | |
8 | Midterm | |
9 | Memories | |
10 | FB-CPU RTL Design | |
11 | Optimizations and Trade-offs | |
12 | SOC Concepts I | |
13 | SOC Concepts II | |
14 | Multi-Clock Zone Design | |
15 | Final and Project Presentations | |